(1) Field of the Invention
The invention relates to the plasma etching of a silicon wafer in the manufacture of integrated circuits.
(2) Description of the Prior Art
As the density of circuit components contained within a semiconductor die has increased and the circuit components have decreased in size and are spaced closer together, it has become increasingly difficult to access selectively a particular region of the silicon wafer through the various layers that are typically superimposed on the surface of the silicon wafer without undesired interference with other active regions.
It is especially important to have a technology that can etch openings that have essentially vertical wall, most notably when the openings are to extend deeply into the surface layers. Additionally, to tolerate some misalignment in the masks used to define such openings, it is advantageous to provide protection to regions that need isolation but that inadvertently lie partially in the path of the projected opening. To this end it is sometimes the practice to surround such regions with a layer of material that resists etching by the process being used to form the openings. Accordingly, a technology that provides the desired results will need an appropriate choice both in the materials used in the layers and the particular etching process used with the materials chosen.
Dry etching, such as plasma etching and reactive ion etching, has become the technology of choice in patterning various layers that are formed over a silicon wafer as it is processed to form therein high density integrated circuit devices. This is because it is a process that not only can be highly selective in the materials it etches, but also highly anisotropic. This makes possible etching with nearly vertical sidewalls.
Basically, in plasma etching as used in the manufacturing of silicon integrated devices, a silicon wafer on whose surface has been deposited various layers, is positioned on a first electrode in a chamber that also includes a second electrode spaced opposite the first. As a gaseous medium that consists of one or more gasses is flowed through the chamber, an r-f voltage, which may include components at different frequencies, is applied between the two electrodes to create a discharge that ionizes the gaseous medium and that forms a plasma that etches the wafer. By appropriate choice of the gasses of the gaseous medium and the parameters of the discharge, selective and anisotropic etching is achieved.
While elaborate theories have been developed to explain the plasma process, in practice most of such processes have been developed largely by experimentation involving trial and error of the relatively poor predictability of results otherwise.
Moreover, because of the number of variables involved and because most etching processes depend critically nor only on the particular materials to be etched but also on the desired selectivity and anisotropy, such experimentation can be time consuming while success often depends on chance.
FIG. 1 shows a Prior Art cross section of etched contact holes that are in this case used for embedded DRAM circuits. The cross section clearly shows the bow type profile problem together with the problem of over-etching into the underlying T.sub.i S.sub.ix. The presented profile of the contact openings 10 has been obtained using the conventional etching sequence for 0.025 um. embedded DRAM circuits. Six gasses were used for this etching procedure which resulted in bow type contact profile and poor underlayer selectivity. The bow type contact opening profile 12 will lead to poor barrier metal uniformity and underlayer loss will result in junction leakage. The cross section of FIG. 1 clearly illustrates that the sidewalls of the contact openings are bowed in shape while it is visible that over-etching occurred into the underlying TiSix substrate.
FIG. 2 shows an enlargement of the lower part 14 of FIG. 1 that further highlights the indicated problems of non-linear profile of the opening sidewalls together with the over-etching into the TiSix substrate. The layer 16 has been treated with the USG process, the layer 18 has been treated with the BPSG process, layer 20 contains TiSi.sub.x.
Borophosphosilicate glass (BPSG) is used for sidewall contouring of the contact holes by reflow. In addition to assuring that the contact holes are opened and that silicon-surface damage and contamination are minimized, it is also important to give the contact holes a shape that will result in good step coverage by the metal that is deposited into it. In general, better step coverage will be obtained if the walls of the openings are sloped and the top corners are rounded. Several different approaches have been pursued to achieve these desired sidewalls profiles. One of the most popular is the reflow of the contact hole dielectric layer. Wafers are exposed to a high temperature step after the holes have been opened. This causes the CVD doped SiO2 layer to flow slightly, producing round corners and sloped sidewalls in the contact holes. BPSG flows at the lowest temperatures (800-850 degrees C. at atmospheric pressure).
Undoped Silicate (USG) is a silicate not doped with boron or phosphorus. The process and use of the USG is similar to the use and process of the BPSG as described above.
The HAR contact etching conditions used in the creation of the profiles as shown in FIG. 1 and FIG. 2. are as follows. Note that a total of six gases are used for this etching procedure, this etching procedure is the Main Etching (ME) procedure of the present or Prior Art etching process.
______________________________________ Etching chamber pressure: 10 Milli Torr Source or top plate power: 700 Watts Bottom plate power: 900 Watts Gas composition: 15 SCCM C.sub.2 F.sub.6 20 SCCM CH.sub.2 F.sub.2 40 SCCM CO 5 SCCM C.sub.4 F.sub.8 5 SCCM O.sub.2 100 SCCM Argon. ______________________________________ Note: SCCM stands for Standard Cubic Centimeter per Minute and as such presents the flowrate of the gas indicated.
The present invention addresses the Prior Art etching process and the etching sequence and gasses used during this process. The present invention provides for the addition of two etching steps, that is a Main Etch (ME) and a Over Etch (OE), these two steps performed under the same operating conditions of the chamber and using three gasses. ME takes place before the above indicated Prior Art etching step while the OE takes place after this etching step.
U.S. Pat. No. 5,366,590 (Kadomura) U.S. Pat. No. 5,445,712 (Yanagida) U.S. Pat. No. 5,658,425 (Halman et al.) and U.S. Pat. No. 5,783,496 (Flanner et al.) show high aspect contact opening etch processes using fluorocarbons and oxygen containing gasses.